Impact of SOI, Si1-xGexOI and GeOI substrates on CMOS compatible Tunnel FET performance

Author:

Mayer F.,Le Royer C.,Damlencourt J.-F.,Romanjek K.,Andrieu F.,Tabone C.,Previtali B.,Deleonibus S.

Publisher

IEEE

Cited by 76 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. P-type Dual Material Gate Si and Si(1-x)Gex TFETs: A Comparative Study for DC and Analog/RF Performance Evaluation;2024 Fourth International Conference on Advances in Electrical, Computing, Communication and Sustainable Technologies (ICAECT);2024-01-11

2. Tunnel Field‐Effect Transistors Based on III–V Semiconductors;Beyond‐CMOS;2023-07-21

3. Realization of Logic Performance using Double Gate TFET (DG-TFET) and Ge source DG-TFET (s-Ge-TFET);2023 3rd International conference on Artificial Intelligence and Signal Processing (AISP);2023-03-18

4. Investigation on RF/Analog Performance in SiGe Pocket n-Tunnel FET;IETE Journal of Research;2023-02-27

5. Simple Ge/Si bilayer junction-based doping-less tunnel field-effect transistor;Nanotechnology;2022-12-13

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