Funder
Instituto de Telecomunicações
Fundação para a Ciência e Tecnologia
Ministerio de Economía y Competitividad
Junta de Andalucía Research Project
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
27 articles.
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1. A Two-step Fine-tuning Assisted Layout Sizing Scheme for Analog/RF Circuits;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. In-depth Multi-Objective charge pump design space exploration towards the automatic synthesis of power management units;AEU - International Journal of Electronics and Communications;2024-04
3. Using Genetic Algorithm and Simulated Annealing with Memory to Solve Layout Synthesis Problem for GaAs MMIC;2023 IEEE 24th International Conference of Young Professionals in Electron Devices and Materials (EDM);2023-06-29
4. DC-Model: A New Method for Assisting the Analog Circuit Optimization;2023 24th International Symposium on Quality Electronic Design (ISQED);2023-04-05
5. A Design-Aware Parasitic-Aware Simulation-Based Tool for the Design of RF Amplifiers;2023 5th International Conference on Smart Systems and Inventive Technology (ICSSIT);2023-01-23