Timely Error Detection for Effective Recovery in Light-Lockstep Automotive Systems

Author:

Hernandez Carles,Abella Jaume

Funder

ARTEMIS Joint Undertaking VeTeSS Project

Ministry of Science and Technology of Spain

European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC)

Ministry of Economy and Competitiveness under Ramon y Cajal Post-Doctoral Fellowship

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 20 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Hybrid Convolutional Neural Networks with Reliability Guarantee;2024 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W);2024-06-24

2. HCRF: A Hardware Checkpoint-based Recovery Framework in light dual-core lockstep processors;Proceedings of the Great Lakes Symposium on VLSI 2024;2024-06-12

3. Hybrid Knowledge and Data Driven Synthesis of Runtime Monitors for Cyber-Physical Systems;IEEE Transactions on Dependable and Secure Computing;2024-01

4. SafeLS: An Open Source Implementation of a Lockstep NOEL-V RISC-V Core;2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS);2023-07-03

5. Design with low complexity fine-grained Dual Core Lock-Step (DCLS) RISC-V processors;2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks - Supplemental Volume (DSN-S);2023-06

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