Author:
Palesi Maurizio,Ascia Giuseppe,Fazzino Fabrizio,Catania Vincenzo
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
34 articles.
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1. RIBiT: Reduced Intra-flit Bit Transitions for Bufferless NoC;2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC);2022-10-03
2. Low-Power Technique for 3D Interconnects;3D Interconnect Architectures for Heterogeneous Technologies;2022
3. Ratatoskr: A Simulator for NoCs in Heterogeneous 3D SoCs;3D Interconnect Architectures for Heterogeneous Technologies;2022
4. Estimation of the Bit-Level Statistics;3D Interconnect Architectures for Heterogeneous Technologies;2022
5. High-Level Estimation of the 3D-Interconnect Capacitances;3D Interconnect Architectures for Heterogeneous Technologies;2022