RIBiT: Reduced Intra-flit Bit Transitions for Bufferless NoC
Author:
Affiliation:
1. CUSAT,Division of Electronics Engineering, School of Engineering,Cochin,India
2. Indian Institute of Technology Guwahati,Dept. of Computer Science and Engineering,Guwahati,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9939277/9939284/09939590.pdf?arnumber=9939590
Reference30 articles.
1. Data Encoding Techniques for Reducing Energy Consumption in Network-on-Chip
2. Dual Stage Encoding Technique to Minimize Cross Coupling across NoC Links
3. Formal derivation of optimal active shielding for low-power on-chip buses
4. A unified transformational approach for reductions in fault vulnerability, power, and crosstalk noise &; delay on processor buses;ayoub,2005
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1. Hardening Bus-Encoders with Power-Aware Single Error Correcting Codes;2024 IEEE European Test Symposium (ETS);2024-05-20
2. An Improved Delta Compression Technique for NoC Packets;2023 International Conference on Next Generation Electronics (NEleX);2023-12-14
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