Author:
Ewetz Rickard,Koh Cheng-Kok
Funder
National Science Foundation
Semiconductor Research Corporation
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
5 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Synthesis of Clock Networks with a Mode-Reconfigurable Topology;ACM Transactions on Design Automation of Electronic Systems;2022-03-08
2. Clock Power Reduction Using NDR Routing;Lecture Notes in Electrical Engineering;2021
3. Soft-Clustering Driven Flip-flop Placement Targeting Clock-induced OCV;Proceedings of the 2020 International Symposium on Physical Design;2020-03-20
4. Synthesis of Clock Networks with a Mode Reconfigurable Topology and No Short Circuit Current;Proceedings of the 2020 International Symposium on Physical Design;2020-03-20
5. Optimal Generalized H-Tree Topology and Buffering for High-Performance and Low-Power Clock Distribution;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2020-02