A manufacturable copper/low-k SiOC/SiCN process technology for 90 nm-node high performance eDRAM
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/7918/21830/01014873.pdf?arnumber=1014873
Cited by 36 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Adhesion enhancement and amine reduction using film redeposited at the interface of a stack of plasma-enhanced CVD dielectrics for Cu/low-k interconnects;Japanese Journal of Applied Physics;2019-01-23
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3. Low-k Mesoporous Pure Silica Zeolite Synthesis with the Centrifugation Process of a Zeolite Precursor;ECS Journal of Solid State Science and Technology;2018
4. A Robust Low-$k$/Cu Dual Damascene Interconnect (DDI) With Sidewall Protection Layer (SPL);IEEE Transactions on Device and Materials Reliability;2011-03
5. Advanced BEOL Technology Overview;Advanced Nanoscale ULSI Interconnects: Fundamentals and Applications;2009
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