Implementation of N-bit Universal BIST for Testing of Memory and Arithmetic Operator Using FPGA
Author:
Affiliation:
1. VNR VJIET,ECE Department,Hyderabad,Telangana,India
2. VNR VJIET,SHARIF,ECE Department,Hyderabad,Telangana,India
3. KL UNIVERSITY,ECE Department,Andhra Pradesh,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10093234/10093245/10093512.pdf?arnumber=10093512
Reference15 articles.
1. Automatic test pattern generation in VLSI — A survey
2. A Proposal for Synthesis of Synchronous Counters
3. FPGA implementation of 16 bit BBS and LFSR PN sequence generator: A comparative study
4. Built-In Self-Test Techniques
5. An improved pattern generation for Built-in Self-test design based on boundary-scan reseeding
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