A 3.7-mW 12.5-MHz 81-dB SNDR 4th-Order Continuous-Time DSM With Single-OTA and 2nd-Order Noise-Shaping SAR-Reference-Cited by-同舟云学术

A 3.7-mW 12.5-MHz 81-dB SNDR 4th-Order Continuous-Time DSM With Single-OTA and 2nd-Order Noise-Shaping SAR

Published:2022 Issue: Volume:2 Page:122-134
ISSN:2644-1349
Container-title:IEEE Open Journal of the Solid-State Circuits Society
language:
Short-container-title:IEEE Open J. Solid-State Circuits Soc.

Author:

Shi Wei¹^ORCID,Liu Jiaxin²^ORCID,Mukherjee Abhishek¹^ORCID,Yang Xiangxing¹^ORCID,Tang Xiyuan³^ORCID,Shen Linxiao⁴^ORCID,Zhao Wenda¹^ORCID,Sun Nan¹

Affiliation:

1. Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA

2. Institute of Integrated Circuits and Systems, University of Electronic Science and Technology of China, Chengdu, China

3. Institute for Artificial Intelligence and School of Integrated Circuit, Peking University, Beijing, China

4. School of Integrated Circuit, Peking University, Beijing, China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/8782712/9733783/09913224.pdf?arnumber=9913224

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2. A 28fJ/conv-step CT ?? modulator with 78dB DR and 18MHz BW in 28nm CMOS using a highly digital multibit quantizer;shu;IEEE Int Solid-State Circuits Conf Dig Tech Papers,2013

3. A low-noise self-calibrating dynamic comparator for high-speed ADCs

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5. 20.2 A 40MHz-BW 320MS/s Passive Noise-Shaping SAR ADC With Passive Signal-Residue Summation in 14nm FinFET

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