20.4 An 8 × - OSR 25MHz-BW 79.4dB/74dB DR/SNDR CT Δ σ Modulator Using 7b Linearized Segmented DACs with Digital Noise-Coupling-Compensation Filter in 7nm FinFET CMOS-Reference-Cited by-同舟云学术

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20.4 An 8 × - OSR 25MHz-BW 79.4dB/74dB DR/SNDR CT Δ σ Modulator Using 7b Linearized Segmented DACs with Digital Noise-Coupling-Compensation Filter in 7nm FinFET CMOS

Published:2019-02 Issue: Volume: Page:
ISSN:
Container-title:2019 IEEE International Solid- State Circuits Conference - (ISSCC)
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Author:

Lo Tien-Yu,Weng Chan-Hsiang,Hsieh Hung-Yi,Shu Yun-Shiang,Chiu Pao-Cheng

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8656625/8662285/08662371.pdf?arnumber=8662371

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 4th-Order CTDSM with PVT-Insensitive Inverter-Based OTAs;2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA);2024-04-22

2. A digital prediction compensation for DR improvement in CT DSM with digital noise coupling;Electronics Letters;2024-02-26

3. Delay Error Shaping in ΔΣ Modulators Using Time-Interleaved High Resolution Quantizers;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-07

4. An 81.6 dB SNDR 15.625 MHz BW Third-Order CT SDM With a True Time-Interleaving Noise-Shaping Quantizer;IEEE Journal of Solid-State Circuits;2023-04

5. High-Speed and High-Performance Continuous-Time ADCs for Automotive Receivers;IEEE Open Journal of the Solid-State Circuits Society;2023

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