On-line Testing for Autonomous Systems driven by RISC-V Processor Design Verification-Reference-Cited by-同舟云学术

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On-line Testing for Autonomous Systems driven by RISC-V Processor Design Verification

Published:2019-10 Issue: Volume: Page:
ISSN:
Container-title:2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
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Author:

Ruospo Annachiara,Cantoro Riccardo,Sanchez Ernesto,Schiavone Pasquale Davide,Garofalo Angelo,Benini Luca

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8863044/8875268/08875345.pdf?arnumber=8875345

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Combining Fault Simulation and Beam Data for CNN Error Rate Estimation on RISC-V Commercial Platforms;2024 IEEE 30th International Symposium on On-Line Testing and Robust System Design (IOLTS);2024-07-03

2. Heterogeneous Flight Management System (FMS) Design for Unmanned Aerial Vehicles (UAVs): Current Stages, Challenges, and Opportunities;Drones;2023-06-06

3. Constraint-Based Automatic SBST Generation for RISC-V Processor Families;2023 IEEE European Test Symposium (ETS);2023-05-22

4. Soft Error Assessment of CNN Inference Models Running on a RISC-V Processor;2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2022-10-24

5. Experimental evaluation of neutron-induced errors on a multicore RISC-V platform;2022 IEEE 28th International Symposium on On-Line Testing and Robust System Design (IOLTS);2022-09-12

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