A 6.5 Gb/s backplane transmitter with 6-tap FIR equalizer and variable tap spacing
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx5/4665385/4671999/04672161.pdf?arnumber=4672161
Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. An adaptive link training based hybrid circuit topology for full‐duplex on‐chip interconnects;International Journal of Circuit Theory and Applications;2023-04-13
2. A 0.0071-mm2 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-10
3. A 2.1-Gb/s 12-Channel Transmitter With Phase Emphasis Embedded Serializer for 55-in UHD Intra-Panel Interface;IEEE Journal of Solid-State Circuits;2018-10
4. 2 × 3.2 Gb/s single‐ended IO transmitter with low‐power dynamic FIR driver for the LPDDR4 standard;Electronics Letters;2017-11
5. A 6 Gb/s transmitter with data-dependent jitter reduction technique for displayport physical layer;Analog Integrated Circuits and Signal Processing;2014-09-25
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