Checks on temperature during on-wafer I-V characterization of Si diodes made with 2-D interfacial layers
Author:
Affiliation:
1. University of Twente,Faculty of EEMCS,Enschede,The Netherlands
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9898143/9898103/09898239.pdf?arnumber=9898239
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1. Monolayer Doping of Si with Improved Oxidation Resistance
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4. Sheet resistance measurement for process monitoring of 400 °C PureB deposition on Si
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1. Identifying nano-Schottky diode currents in silicon diodes with 2D interfacial layers;2023 35th International Conference on Microelectronic Test Structure (ICMTS);2023-03-27
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