Reliability of Fan-Out Wafer-Level Packaging with Large Chips and Multiple Re-Distributed Layers-Reference-Cited by-同舟云学术

Reliability of Fan-Out Wafer-Level Packaging with Large Chips and Multiple Re-Distributed Layers

Published:2018-05 Issue: Volume: Page:
ISSN:
Container-title:2018 IEEE 68th Electronic Components and Technology Conference (ECTC)
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Author:

Lau John,Kuah Eric,Li Zhang,Tan Kim Hwee,Cheung Y.M.,Ng Eric,Lo Penny,Kai Wu,Hao Ji,Beica Rozalia,Wee Koh Sau,Li Ming,Ran Jiang,Xi Cao,Lim Sze Pei,Lee N.C.,Ko Cheng-Ta,Yang Henry,Chen Y.H.,Tao Mian,Lo Jeffery,Lee Ricky,Yang Lei,Li Margie,Yong Qing Xiang,Cheng Zhong,Chen Tony,Xu Iris,Fan Nelson

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8415930/8429093/08429752.pdf?arnumber=8429752

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