A gm/Id based methodology to estimate OTA requirements in low-pass discrete time Σ∆-ADCs
Author:
Affiliation:
1. Université Grenoble Alpes,CEA-Leti,Grenoble,France,F-38000
2. X-FAB Semiconductor Foundries,Corbeil-Essonnes,France,91100
3. Université Paris-Saclay, CentraleSupélec, CNRS, GeePs,Gif-sur-Yvette,France,91192
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10557746/10557828/10557892.pdf?arnumber=10557892
Reference16 articles.
1. Understanding Delta-Sigma Data Converters
2. Modeling of a Second Order Non-Ideal Sigma- Delta Modulator;Dendouga;International Journal of Electronics and Communication Engineering (IJECE),2010
3. Behavioral Modeling Methods for Switched-Capacitor Sigma Delta Modulators;George;IEEE Transactions on Circuits and Systems I (TCAS-I): Regular Papers,2007
4. Reliable analysis of settling errors in SC integrators-application to the design of high-speed ΣΔ modulators
5. Behavioral modeling of switched-capacitor sigma-delta modulators
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