Reliable analysis of settling errors in SC integrators-application to the design of high-speed ΣΔ modulators

Author:

del Rio R.,Medeiro F.,Perez-Verdu B.,Rodriguez-Vazquez A.

Publisher

Presses Polytech. Univ. Romandes

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A gm/Id based methodology to estimate OTA requirements in low-pass discrete time Σ∆-ADCs;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

2. Optimization of Slew Mitigation Capacitor in Passive Charge Compensation-Based Delta–Sigma Modulator;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-06

3. Energy Efficiency in Slew-Rate Enhanced Single-Stage OTAs for Switched-Capacitor Applications;Journal of Low Power Electronics and Applications;2020-12-24

4. Analysis of op-amp phase margin impact on SC ΣΔ modulator performance;Microelectronics Journal;2010-07

5. Analysis of the Impact of High-Order Integrator Dynamics on SC Sigma-Delta Modulator Performances;IEEE Transactions on Circuits and Systems I: Regular Papers;2010-03

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