A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inference
Author:
Affiliation:
1. Nanjing University,School of Electronic Science and Engineering,Nanjing,China
Funder
National Natural Science Foundation of China
Nanjing University
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10557746/10557828/10558028.pdf?arnumber=10558028
Reference24 articles.
1. Towards Developing High Performance RISC-V Processors Using Agile Methodology
2. Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode
3. Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode
4. DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training
5. Yun: An Open-Source, 64-Bit RISC-V-Based Vector Processor With Multi-Precision Integer and Floating-Point Support in 65-nm CMOS
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1. Exploring RISC-V Based DNN Accelerators;2024 IEEE International Conference on Omni-layer Intelligent Systems (COINS);2024-07-29
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