A Self-Corrected, Self-Cleaned MEMS and Suitable for Advanced Foundry Multi-Project Wafer (MPW)
Author:
Affiliation:
1. Indian Institute of Technology,Centre for Applied Research in Electronics,New-Delhi
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10052111/10052113/10052195.pdf?arnumber=10052195
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1. Laser-assisted stress reduction in molybdenum microstructures for CMOS compatible MEMS integration
2. Nanosecond Laser Anneal (NLA) for Si-Implanted HfO2 Ferroelectric Memories Integrated in Back-End of Line (BEOL)
3. Configurable Post-Release Stress-Engineering of Surface Micro-Machined MEMS Structures
4. Experimental Analysis of Vapor HF Etch Rate and Its Wafer Level Uniformity on a CMOS-MEMS Process
5. Volatile or non-volatile switching? Establishing design parameters for metal-contact relays using ON/OFF hysteretic behavior (RT to 300 °C)
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