Reliability Testing Technology and Equiment for Interconnection between PCB and Chips

Author:

He Shilie1,Shi Linlin2,Chen Yiqiang3,Zhou Zhenwei3,Jia Hanguang3,Shen Limin4

Affiliation:

1. Northwestern Polytechnical University,Xi'an,China

2. Huangpu Institute of Materials,Guangzhou,China

3. The Fifth Electronics Research Institute of Ministry of Industry and Information Technology,Guangzhou,China

4. Department of Electrical Engineering Guangzhou Railway Polytechnic,Guangzhou,China

Funder

Ministry of Industry and Information Technology

Publisher

IEEE

Reference6 articles.

1. Impact of Isothermal Aging and Testing Temperature on Large Flip-Chip BGA Interconnect Mechanical Shock Performance

2. Failure diagnosis of FPGA solder joint [J];WANG;Chinese Journal of Welding,2014

3. Design of BGA encapsulated FPGA solder joint failure diagnosis system[J];ZHONG;Computer Measurement and Control,2014

4. Design and Implementationstrategy of Board LEVEL BIST based on FPGA[J];DU;Computer Measurement and Control,2008

5. Design of EtherCAT Slave System Based on Zynq-7020 Chip

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