A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms

Author:

Bavikadi Sathwika1ORCID,Dhavlle Abhijitt1,Ganguly Amlan2ORCID,Haridass Anand3ORCID,Hendy Hagar2,Merkel Cory2,Reddi Vijay Janapa4,Sutradhar Purab Ranjan2,Joseph Arun5ORCID,Pudukotai Dinakarrao Sai Manoj1ORCID

Affiliation:

1. Department of Electrical and Computer Engineering, George Mason University, Fairfax, VA, USA

2. Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA

3. Intel Corporation, Bengaluru, India

4. John A. Paulson School of Engineering and Applied Sciences, Harvard University, Cambridge, MA, USA

5. IBM Electronic Design Automation, Bengaluru, India

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference178 articles.

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2. NEXA: Cloud native platform for collaborative hardware logic design in step-wise refinement implementation flows;joseph;Proc Design Automat Conf,2021

3. EDA 3.0: EDAaaS, EDA as a service;stok;Proc TAU,2015

4. Ultra-low precision 4-bit training of deep neural networks;sun;Proc Adv Neural Inf Process Syst,2020

5. A Survey of AI Accelerators for Edge Environment

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