Hardware Acceleration and Approximation of CNN Computations: Case Study on an Integer Version of LeNet
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Published:2024-07-11
Issue:14
Volume:13
Page:2709
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ISSN:2079-9292
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Container-title:Electronics
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language:en
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Short-container-title:Electronics
Author:
Leveugle Régis1ORCID, Cogney Arthur2, Gah El Hilal Ahmed Baba2, Lailler Tristan2ORCID, Pieau Maxime2
Affiliation:
1. University Grenoble Alpes, CNRS, Grenoble INP, TIMA, 38000 Grenoble, France 2. University Grenoble Alpes, Grenoble INP, Polytech Grenoble, 38000 Grenoble, France
Abstract
AI systems have an increasing sprawling impact in many application areas. Embedded systems built on AI have strong conflictual implementation constraints, including high computation speed, low power consumption, high energy efficiency, strong robustness and low cost. Neural Networks (NNs) used by these systems are intrinsically partially tolerant to computation disturbances. As a consequence, they are an interesting target for approximate computing seeking reduced resources, lower power consumption and faster computation. Also, the large number of computations required by a single inference makes hardware acceleration almost unavoidable to globally meet the design constraints. The reported study, based on an integer version of LeNet, shows the possible gains when coupling approximation and hardware acceleration. The main conclusions can be leveraged when considering other types of NNs. The first one is that several approximation types that look very similar can exhibit very different trade-offs between accuracy loss and hardware optimizations, so the selected approximation has to be carefully chosen. Also, a strong approximation leading to the best hardware can also lead to the best accuracy. This is the case here when selecting the ApxFA5 adder approximation defined in the literature. Finally, combining hardware acceleration and approximate operators in a coherent manner also increases the global gains.
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