2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters-Reference-Cited by-同舟云学术

2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters

Published:2020-02 Issue: Volume: Page:
ISSN:
Container-title:2020 IEEE International Solid- State Circuits Conference - (ISSCC)
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Author:

Vivet Pascal,Guthmuller Eric,Thonnart Yvain,Pillonnet Gael,Moritz Guillaume,Miro-Panades Ivan,Fuguet Cesar,Durupt Jean,Bernard Christian,Varreau Didier,Pontes Julian,Thuries Sebastien,Coriat David,Harrand Michel,Dutoit Denis,Lattard Didier,Arnaud Lucile,Charbonnier Jean,Coudrain Perceval,Garnier Arnaud,Berger Frederic,Gueugnot Alain,Greiner Alain,Meunier Quentin,Farcy Alexis,Arriordaz Alexandre,Cheramy Severine,Clermidy Fabien

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9046640/9062887/09062927.pdf?arnumber=9062927

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