13.2 A 1Tb 4b/Cell 96-Stacked-WL 3D NAND Flash Memory with 30MB/s Program Throughput Using Peripheral Circuit Under Memory Cell Array Technique-Reference-Cited by-同舟云学术

13.2 A 1Tb 4b/Cell 96-Stacked-WL 3D NAND Flash Memory with 30MB/s Program Throughput Using Peripheral Circuit Under Memory Cell Array Technique

Published:2020-02 Issue: Volume: Page:
ISSN:
Container-title:2020 IEEE International Solid- State Circuits Conference - (ISSCC)
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Author:

Huh Hwang,Cho Wanik,Lee Jinhaeng,Noh Yujong,Park Yongsoon,Ok Sunghwa,Kim Jongwoo,Cho Kayoung,Lee Hyunchul,Kim Geonu,Park Kangwoo,Kim Kwanho,Lee Heejoo,Chai Sooyeol,Kwon Chankeun,Cho Hanna,Jeong Chanhui,Yang Yujin,Goo Jayoon,Park Jangwon,Lee Juhyeong,Kirr Heonki,Jo Kangwook,Park Cheoljoong,Nam Hyeonsu,Song Hyunseok,Lee Sangkyu,Jeong Woopyo,Ahn Kun-Ok,Jung Tae-Sung

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9046640/9062887/09063117.pdf?arnumber=9063117

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