6.8 A 100Gb/s NRZ Transmitter with 8-Tap FFE Using a 7b DAC in 40nm CMOS

Author:

Peng Pen-Jui,Lai Sheng-Tsung,Wang Wei-Hung,Lin Chiang-Wei,Huang Wei-Chien,Shih Ted

Publisher

IEEE

Cited by 15 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 100-Gb/s PAM-8 Transmitter With 3-Tap FFE and High-Swing Hybrid Driver in 40-nm CMOS Technology;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-06

2. Digital-to-Analog Converters for 100+ Gb/s Wireline Transmitters: Architectures, Circuits, and Calibration;2024 IEEE Custom Integrated Circuits Conference (CICC);2024-04-21

3. A 64Gbps 1.36 Vppd 1.44pJ/b Fully CMOS-Style Transmitter with Active Hybrid Driver in 28nm CMOS;2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS);2023-08-06

4. An 8-GHz Octa-Phase Clock Corrector with Phase and Duty-Cycle Correction in 40-nm CMOS;2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS);2023-08-06

5. A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links;IEEE Journal of Solid-State Circuits;2023-04

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