Author:
Keser B.,Amrine C.,Trung Duong ,Hayes S.,Leal G.,Lytle W.,Mitchell D.,Wenzel R.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
20 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Optimizing RDS(on) of Dual-Chip Power MOSFET by Fan-out Panel Level Packaging (FOPLP);2022 23rd International Conference on Electronic Packaging Technology (ICEPT);2022-08-10
2. Wafer‐Scale Integration;Wiley Encyclopedia of Electrical and Electronics Engineering;2022-02-17
3. Virtual Prototyping, Design for Reliability, and Qualification for a Full SiP Product Portfolio of a FOWLP Line;2020 21st International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE);2020-07
4. Experimental Verification and Optimization Analysis of Warpage for Panel-Level Fan-Out Package;IEEE Transactions on Components, Packaging and Manufacturing Technology;2017-10
5. Impact of Process Control on UBM/RDL Contact Resistance for Next-Generation Fan-Out Devices;2017 IEEE 67th Electronic Components and Technology Conference (ECTC);2017-05