Impact of FPGA Architecture on Area and Performance of CGRA Overlays

Author:

Taras Ian,Anderson Jason H.

Publisher

IEEE

Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. FLASH: FPGA-Accelerated Smart Switches with GCN Case Study;Proceedings of the 37th International Conference on Supercomputing;2023-06-21

2. DMPRA: A Dynamic Reconfiguration Mechanism for a Dual-Mode Programmable Reconfigurable Array Architecture;Journal of Circuits, Systems and Computers;2022-12-10

3. Realization of Turbo Decoder on Coarse Grained Reconfigurable Architectures;2022 IEEE 19th India Council International Conference (INDICON);2022-11-24

4. Agile design of DCT circuit on soft CGRA;International Conference on High Performance Computing and Communication (HPCCE 2021);2022-02-18

5. A RISC-V-based FPGA Overlay to Simplify Embedded Accelerator Deployment;2021 24th Euromicro Conference on Digital System Design (DSD);2021-09

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