A 0.3V-VIN, 0.015ps-FoM Fully Integrated Analog-Assisted Digital LDO With Dual-Negative Gate Control and Adaptive Transient Recovery Path
Author:
Affiliation:
1. School of Electrical Engineering, Korea University, Seoul, South Korea
2. System LSI Business, Samsung Electronics, Hwaseong, South Korea
Funder
Samsung
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/63/9911205/09878210.pdf?arnumber=9878210
Reference12 articles.
1. A smart-offset analog LDO with 0.3V minimum input voltage and 99.1% current efficiency
2. A Fully-On-Chip Analog Low-Dropout Regulator With Negative Charge Pump for Low-Voltage Applications
3. 0.5–1-V, 90–400-mA, Modular, Distributed, 3 × 3 Digital LDOs Based on Event-Driven Control and Domino Sampling and Regulation
4. A 500mA analog-assisted digital-LDO-based on-chip distributed power delivery grid with cooperative regulation and IR-drop reduction in 65nm CMOS
5. A Fast Droop-Recovery Event-Driven Digital LDO With Adaptive Linear/Binary Two-Step Search for Voltage Regulation in Advanced Memory
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1. A 92.7%-Efficiency 6.78-MHz Energy-Resuscitating Resonant Regulating Rectifier With Dual Outputs for Wirelessly Powered Devices;IEEE Journal of Solid-State Circuits;2024
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