A Simplified Design of Fast Error Correction Module Using Reed-Solomon Code
Author:
Affiliation:
1. Nitte Meenakshi Institute of Technology,Dept. of Electrical and Electronics Engineering,Bengaluru,India
Funder
NITTE Meenakshi Institute of Technology
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10389814/10389816/10390231.pdf?arnumber=10390231
Reference15 articles.
1. Design of FPGA-Implemented Reed–Solomon Erasure Code (RS-EC) Decoders With Fault Detection and Location on User Memory
2. Forward Error Correction
3. FPGA based design and implementation of Reed-Solomon encoder & decoder for error detection and correction
4. A study on different techniques for security of an image;Parameshachari;International Journal of Recent Technology and Engineering (IJRTE),2013
5. Implement Reed Solomon Encoder/Decoder Using Spartan FPGA;Mangtani;structure,2016
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