FPGA based design and implementation of Reed-Solomon encoder & decoder for error detection and correction

Author:

Parvathi P.,Prasad P. Rajendra

Publisher

IEEE

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Simplified Design of Fast Error Correction Module Using Reed-Solomon Code;2023 International Conference on Ambient Intelligence, Knowledge Informatics and Industrial Electronics (AIKIIE);2023-11-02

2. VLSI Implementation of Error Correction Codes for Molecular Communication;Wireless Personal Communications;2023-04-05

3. Implementation of Cyclic Reed–Muller Code for Molecular Communication;Advances in Smart Communication and Imaging Systems;2021

4. Review Paper: Error Detection and Correction Onboard Nanosatellites;Advances in Intelligent Systems and Computing;2021

5. TMR Group Coding Method for Optimized SEU and MBU Tolerant Memory Design;2018 IEEE International Symposium on Circuits and Systems (ISCAS);2018

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