A Family of Logical Fault Models for Reversible Circuits-Reference-Cited by-同舟云学术

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A Family of Logical Fault Models for Reversible Circuits

Published:2005 Issue: Volume: Page:
ISSN:
Container-title:14th Asian Test Symposium (ATS'05)
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Author:

Polian I.,Fiehn T.,Becker B.,Hayes J.P.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/10525/33306/01575466.pdf?arnumber=1575466

Cited by 78 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Fault Detection Approach for Smgf and Mmgf in Quantum Circuits;2024

2. Design‐for‐testability for reversible logic circuits based on bit‐swapping;IET Quantum Communication;2023-11-30

3. A Fault Detection Method for Missing Gate Faults in Reversible Circuits Using Binary to Gray Code Conversion;TENCON 2023 - 2023 IEEE Region 10 Conference (TENCON);2023-10-31

4. Exploiting Reversible Computing for Verification;Proceedings of the 28th Asia and South Pacific Design Automation Conference;2023-01-16

5. Analysis of Single Missing Gate Faults in Quantum Circuit;Lecture Notes in Networks and Systems;2022-11-10

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