Experimental 0.1 mu m p-channel MOSFET with p/sup +/-polysilicon gate on 35 AA gate oxide-Reference-Cited by-同舟云学术

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Experimental 0.1 mu m p-channel MOSFET with p/sup +/-polysilicon gate on 35 AA gate oxide

Published:1993-06 Issue:6 Volume:14 Page:304-306
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Taur Y.,Cohen S.,Wind S.,Lii T.,Hsu C.,Quinlan D.,Chang C.A.,Buchanan D.,Agnello P.,Mii Y.-J.,Reeves C.,Acovic A.,Kesan V.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx1/55/5622/00215206.pdf?arnumber=215206

Cited by 15 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. The investigation of key technologies for sub-0.1-μm CMOS device fabrication;IEEE Transactions on Electron Devices;2001-07

2. 3-D visualization of deep submicrometer transistor characteristics;IEEE Transactions on Semiconductor Manufacturing;2000-05

3. Discussion;Solid-State Electronics;1998-03

4. CMOS scaling into the nanometer regime;Proceedings of the IEEE;1997-04

5. Organic insulating films of nanometer thicknesses;Applied Physics Letters;1996-09-09

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