Design Space Exploration of Multi-Stage Op Amps by Symbolic Modeling and gm/ID Sampling
Author:
Affiliation:
1. School of Electronic, Information and Electrical Engineering, Shanghai Jiao Tong University,Department of Micro/Nano-Electronics,Shanghai,China
2. Huawei Technologies Co., Ltd,Shenzhen,China
Funder
National Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10218344/10218369/10218716.pdf?arnumber=10218716
Reference23 articles.
1. Sizing of multi-stage Op Amps by combining design equations with the gm/ID method
2. Topological Approach to Symbolic Pole–Zero Extraction Incorporating Design Knowledge
3. Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology
4. A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA;silveira;IEEE Journal of Solid-State Circuits,1996
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1. Automated Generation Procedure for Fully Differential Op-Amp Using TED;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
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3. Multistage Op Amp design space exploration by gm/ID$$ {g}_m/{I}_D $$ sampling and symbolic design equations;International Journal of Circuit Theory and Applications;2023-09-25
4. Automatic generation of macromodels and design equations for application to Op Amp design;International Journal of Circuit Theory and Applications;2023-06
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