In-Ga-Zn-O Source-Gated Transistors with 3nm SiO<sub>2</sub> Tunnel Layer on a Flexible Polyimide Substrate-Reference-Cited by-同舟云学术

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In-Ga-Zn-O Source-Gated Transistors with 3nm SiO₂ Tunnel Layer on a Flexible Polyimide Substrate

Published:2023-08-13 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE International Flexible Electronics Technology Conference (IFETC)
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Author:

Corsino Dianne C.¹,Bestelink Eva²,Catania Federica¹,Sporea Radu A.²,Münzenrieder Niko¹,Cantarella Giuseppe¹

Affiliation:

1. Free University of Bolzano-Bolzano,Faculty of Engineering,Bolzano,Italy,39100

2. Advanced Technology Institute, University of Surrey,Guildford, Surrey,United Kingdom,GU2 7XH

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10254736/10254789/10254818.pdf?arnumber=10254818

Reference16 articles.

1. Flexible Microcrystalline Silicon Source-Gated Transistors with Negliglible DC Performace Degradation at 2.5 mm Bending Radius

2. High-performance and low-power source-gated transistors enabled by a solution-processed metal oxide homojunction

3. Non-equipotential effect observed on the surface of Ti/Si under uniform illumination

4. Analysis of Schottky barrier source-gated transistors in a-Si:H

5. Micron-scale inkjet-assisted digital lithography for large-area flexible electronics

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