On-Chip Fault Monitoring Using Self-Reconfiguring IEEE 1687 Networks

Author:

Zadegan Farrokh GhaniORCID,Nikolov DimitarORCID,Larsson ErikORCID

Funder

Seventh Framework Programme

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. An Architectural Framework for On-Line Health Monitoring of Integrated Circuits;2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS);2023-08-06

2. Refreshing the JTAG Family;2023 IEEE 41st VLSI Test Symposium (VTS);2023-04-24

3. Power-aware test scheduling framework for IEEE 1687 multi-power domain networks using formal techniques;Microelectronics Reliability;2022-07

4. Accessing general IEEE Std. 1687 networks via functional ports;2021 IEEE International Test Conference (ITC);2021-10

5. Research on Fault Monitoring of Transmission Loop Network in Main Controlling System for Radio and Television Station Based on Asymmetric Polling Scheme;Advances in Intelligent Automation and Soft Computing;2021-07-25

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