An Analog-Assisted Digital LDO With Single Subthreshold Output pMOS Achieving 1.44-fs FOM
Author:
Funder
Semiconductor Research Corporation
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8011414/9329187/09523586.pdf?arnumber=9523586
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Four-Phase Time-Based Switched-Capacitor LDO With 13-ns Settling Time at 0.5-V Input for Energy-Efficient Computing in SoC Applications;IEEE Journal of Solid-State Circuits;2024-02
2. A Fast-Transient Responses Power-efficiency LDO Regulator with Transient-current Enhanced Buffer;Journal of Physics: Conference Series;2023-06-01
3. Design of LDO Regulator With High Reliability ESD Protection Circuit Using Analog Current Switch Structure for 5-V Applications;IEEE Access;2023
4. Low-Power Design of Digital LDO With Nonlinear Symmetric Frequency Generation;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-12
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