A Fast-Transient Responses Power-efficiency LDO Regulator with Transient-current Enhanced Buffer

Abstract

Abstract In this paper, we introduce a Low-Dropout (LDO) Regulator that features a transient-current enhanced buffer, providing fast transient responses and high-power efficiency. The buffer, which incorporates an AC-coupled network and a high-gain stage, enhances the load transient response by boosting the charging or discharging current to the gate capacitor of the power transistor, without consuming extra power under varying load conditions. The LDO was designed using a standard 65 nm CMOS process and has a load capacitance of 100 pF and an on-chip compensation capacitance of only 2.7 pF. Simulation results reveal that the LDO has a low static current of 20 μA and a maximum load capacity of 200 mA. When the LDO output switches from a light load of 100 μA to a heavy load of 20 mA within 1 μs, the undershoot voltage is 53 mV and the transient response time is 1.34 μs. Conversely, when switching from heavy load to light load, the overshoot voltage is 51 mV and the transient response time is 0.50 μs.