Author:
Capalija Davor,Abdelrahman Tarek S.
Cited by
10 articles.
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1. RapidStream 2.0: Automated Parallel Implementation of Latency–Insensitive FPGA Designs Through Partial Reconfiguration;ACM Transactions on Reconfigurable Technology and Systems;2023-09
2. A Scalable Many-core Overlay Architecture on an HBM2-enabled Multi-Die FPGA;ACM Transactions on Reconfigurable Technology and Systems;2023-01-18
3. OverGen: Improving FPGA Usability through Domain-specific Overlay Generation;2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO);2022-10
4. RapidStream;Proceedings of the 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays;2022-02-11
5. Flexible Runtime Reconfigurable Computing Overlay Architecture and Optimization for Dataflow Applications;2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar);2020-11