Automatic High-Level Hardware Checkpoint Selection for Reconfigurable Systems
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7155747/7160017/07160060.pdf?arnumber=7160060
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Framework for Live Migration of FPGA based ECB-mode AES-128 accelerator;2022 2nd International Conference on Digital Futures and Transformative Technologies (ICoDT2);2022-05-24
2. Efficient hardware task migration for heterogeneous FPGA computing using HDL-based checkpointing;Integration;2021-03
3. The Effect of Cycling Through a Projection-Based Virtual Environment System on Generalized Anxiety Disorder;Journal of Clinical Medicine;2019-07-04
4. A Tree-Based Checkpointing Architecture for the Dependability of FPGA Computing;IEICE Transactions on Information and Systems;2018
5. Efficient Multitasking on FPGA Using HDL-Based Checkpointing;Applied Reconfigurable Computing. Architectures, Tools, and Applications;2018
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