Performance Comparison of Speculative Taskloop and OpenMP-for-Loop Thread-Level Speculation on Hardware Transactional Memory
Author:
Affiliation:
1. DEMAC/IGCE – São Paulo State University (Unesp)
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9934944/9934946/09934994.pdf?arnumber=9934994
Reference21 articles.
1. Using Hardware-Transactional-Memory Support to Implement Thread-Level Speculation
2. Thread-level speculation on off-the-shelf hardware transactional memory
3. Using hardware transactional memory to implement speculative privatization in OpenMP;salamanca;Intern Workshop on Languages and Compilers for Parallel Computing (LCPC),2020
4. A Proposal for Supporting Speculation in the OpenMP taskloop Construct
5. Improving speculative taskloop in hardware transactional mem-ory;salamanca;International Workshop on OpenMP (IWOMP),2021
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1. How to Efficiently Parallelize Irregular DOACROSS Loops Using Fine Granularity and OpenMP Tasks: The SPEC mcf Case;OpenMP: Advanced Task-Based, Device and Compiler Programming;2023
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