A multi-channel, 10ps resolution, FPGA-based TDC with 300MS/s throughput for open-source PET applications
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/6144196/6152483/06154362.pdf?arnumber=6154362
Cited by 28 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Review of Advancements and Trends in Time-to-Digital Converters Based on FPGA;IEEE Transactions on Instrumentation and Measurement;2024
2. LinoSPAD2: an FPGA-based, hardware-reconfigurable 512×1 single-photon camera system;Optics Express;2023-12-13
3. A High-Precision Folding Time-to-Digital Converter Implemented in Kintex-7 FPGA;IEEE T INSTRUM MEAS;2023
4. Ultra compact pulse shrinking TDC on FPGA;Measurement;2022-11
5. A Bin-by-Bin Calibration with Neural Network for FPGA-Based Tapped-Delay-Line Time-to-Digital Converter;2022 IEEE International Conference on Real-time Computing and Robotics (RCAR);2022-07-17
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