A Protocol Layer Test Strategy of Interlaken Embedded in FPGA
Author:
Affiliation:
1. Microelectronics Instruments and Equipment R&D Center, Institute of Microelectronics, Chinese Academy of Sciences,Beijing,China
2. Beijing Microelectronics Technology Institute,Beijing,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9836326/9836330/09836334.pdf?arnumber=9836334
Reference12 articles.
1. Application of IEEE-370 for PCIe Interconnect Test with 2X-Thru De-embedding
2. Automotive Ethernet System level Signal Integrity and Protocol Test using Software based Signal Separation
3. The design and implementation of 10 gigabit ethernet link based on FPGA [J];kong;Microelectronics & Computer,2019
4. Error correction on 64/66 bit encoded links
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