Design and Implementation of ADCBIST for Dynamic Parameter Measurement
Author:
Affiliation:
1. Greater Noida Institute of Technology,Department of ECE,Greater Noida
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10560062/10560067/10560351.pdf?arnumber=10560351
Reference7 articles.
1. A BIST architecture for sigma delta ADC testing based on embedded NOEB Self-Test and CORDIC algorithm
2. A BIST scheme for on-chip ADC and DAC testing
3. Optimized System Level Hardware Realization of Built-in-Self-Test Approach for Sigma-Delta Analog-to-Digital Converter
4. Low-cost and accurate DAC linearity test with ultrafast segmented model identification of linearity errors and removal of measurement errors (uSMILE-ROME)
5. A BIST scheme for an SNR test of a sigma-delta ADC;Roberts
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