Stable, Reliable, and Bit-Interleaving 12T SRAM for Space Applications: A Device Circuit Co-Design-Reference-Cited by-同舟云学术

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Stable, Reliable, and Bit-Interleaving 12T SRAM for Space Applications: A Device Circuit Co-Design

Published:2017-08 Issue:3 Volume:30 Page:276-284
ISSN:0894-6507
Container-title:IEEE Transactions on Semiconductor Manufacturing
language:
Short-container-title:IEEE Trans. Semicond. Manufact.

Author:

Yadav Nandakishor^ORCID,Shah Ambika Prasad^ORCID,Vishvakarma Santosh Kumar^ORCID

Funder

TCAD software through the Council of Scientific and Industrial Research, Government of India

Science and Engineering Research Board, Government of India

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/66/7997968/07954770.pdf?arnumber=7954770

Cited by 51 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Single ended 12T cntfet sram cell with high stability for low power smart device applications;e-Prime - Advances in Electrical Engineering, Electronics and Energy;2024-03

2. Hardware Efficient Transposable 8T SRAM for Orthogonal Data Access;IEEE Access;2024

3. Subthreshold Slope Variability and its Impact on Ultra-Low Power Circuit Design through Device-Circuit Simulations;2023 International Conference on Power Energy, Environment & Intelligent Control (PEEIC);2023-12-19

4. Design and Validation of Low Power SRAM Cell with Nano Meter Regime;2023 Global Conference on Information Technologies and Communications (GCITC);2023-12-01

5. Improved Stability for Robust and Low-Power SRAM Cell using FinFET Technology;Journal of Circuits, Systems and Computers;2023-10-28

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