Author:
Yao Hailong,Cai Yici,Gao Qiang
Cited by
13 articles.
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1. Analog Integrated Circuit Routing Techniques: An Extensive Review;IEEE Access;2023
2. Pole-Aware Analog Layout Synthesis Considering Monotonic Current Flows and Wire Crossings;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-01
3. Performance-driven Wire Sizing for Analog Integrated Circuits;ACM Transactions on Design Automation of Electronic Systems;2022-12-24
4. A Style-Based Analog Layout Migration Technique With Complete Routing Behavior Preservation;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021-12
5. Gradient Error Compensation in SC-MDACs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2020-12