Accurate prediction of the impact of on-chip inductance on interconnect delay using electrical and physical parameter-based RSF-Reference-Cited by-同舟云学术

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Accurate prediction of the impact of on-chip inductance on interconnect delay using electrical and physical parameter-based RSF

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Container-title:Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003.
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Author:

Sato T.,Kanamoto T.,Kurokawa A.,Kawakami Y.,Oka H.,Kitaura T.,Kobayashi H.,Hashimoto M.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/8504/26878/01195008.pdf?arnumber=1195008

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Impact of mutual inductance on timing in nano-scale SoC;IEICE Electronics Express;2018

2. Interconnect Modeling: A Physical Design Perspective;IEEE Transactions on Electron Devices;2009-09

3. On the impact of on-chip inductance on signal nets under the influence of power grid noise;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2005-03

4. Bounding bus delay and noise effects of on-chip inductance;Proceedings. 45th Annual IEEE Symposium on Foundations of Computer Science

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