Resistive-Open Defects in Embedded-SRAM Core Cells: Analysis and March Test Solution-Reference-Cited by-同舟云学术

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Resistive-Open Defects in Embedded-SRAM Core Cells: Analysis and March Test Solution

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Container-title:13th Asian Test Symposium
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Author:

Dilillo L.,Girard P.,Pravossoudovitch S.,Virazel A.,Borri S.,Hage-Hassan M.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/9468/30045/01376569.pdf?arnumber=1376569

Cited by 31 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. The effect of resistive open faults on SRAM;AIP Conference Proceedings;2024

2. H²C-TM: A Hybrid High Coverage Test Method for Improving the Detection of HtD Faults in STT-MRAMs;IEEE Transactions on Device and Materials Reliability;2023-06

3. LCHC-DFT: A Low-Cost High-Coverage Design-for-Testability Technique to Detect Hard-to-Detect Faults in STT-MRAMs in the Presence of Process Variations;IEEE Transactions on Device and Materials Reliability;2022-12

4. An Experimental Evaluation of Resistive Defects and Different Testing Solutions in Low-Power Back-Biased SRAM Cells;Electronics;2022-01-10

5. Study on Paradigm of Variable Length SRAM Embedded Memory Testing;2021 5th International Conference on Electronics, Communication and Aerospace Technology (ICECA);2021-12-02

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