Implementation and Characterization of 14 nm Trigate HOI n-FinFET using Strained Silicon channel with reduced area on chip-Reference-Cited by-同舟云学术

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Implementation and Characterization of 14 nm Trigate HOI n-FinFET using Strained Silicon channel with reduced area on chip

Published:2021-04-02 Issue: Volume: Page:
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Container-title:2021 6th International Conference for Convergence in Technology (I2CT)
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Author:

Nanda Swagat,Dhar Rudra Sankar

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9417810/9417812/09417877.pdf?arnumber=9417877

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Performance Evaluation of Nano-channel FinFET For Lower Power Application;2023 3rd International conference on Artificial Intelligence and Signal Processing (AISP);2023-03-18

2. Design and Development of 8T SRAM Cell Using 14 nm FinFET;Topical Drifts in Intelligent Computing;2022

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