Bondwire Model and Compensation Network for 60 GHz Chip-to-PCB Interconnects
Author:
Funder
Bundesministerium fr Bildung und Forschung
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/7727/9616477/09525269.pdf?arnumber=9525269
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Ultrawideband Chip-to-Chip Interconnect Using Bond Wire With Sidewalls;IEEE Transactions on Components, Packaging and Manufacturing Technology;2023-12
2. Design of crosstalk aware energy harvesting system-on-chip;AEU - International Journal of Electronics and Communications;2023-10
3. High-Efficiency and Cost-Effective 10 W Broadband Continuous Class-J Mode Quasi-MMIC Power Amplifier Design Utilizing 0.25 μm GaN/SiC and GaAs IPD Technology for 5G NR n77 and n78 Bands;Electronics;2023-08-17
4. Embedded mm-Wave Chiplet Based Module using Fused-Silica Stitch-Chip Technology: RF Characterization and Thermal Evaluation;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05
5. Extraction and Compensation of Bonding Wires Parasitic Parameter;2022 Cross Strait Radio Science & Wireless Technology Conference (CSRSWTC);2022-12-17
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