PROBE3.0: A Systematic Framework for Design-Technology Pathfinding With Improved Design Enablement-Reference-Cited by-同舟云学术

PROBE3.0: A Systematic Framework for Design-Technology Pathfinding With Improved Design Enablement

Published:2023 Issue: Volume: Page:1-1
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Choi Suhyeong¹,Jung Jinwook²^ORCID,Kahng Andrew B.³^ORCID,Kim Minsoo⁴^ORCID,Park Chul-Hong⁵,Pramanik Bodhisatta⁶,Yoon Dooseok⁶

Affiliation:

1. Department of Electrical Engineering, Stanford University, Stanford, CA, USA

2. IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA

3. Departments of Computer Science and Engineering, and of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA, USA

4. NVIDIA Corporation, Austin, TX, USA

5. Hyundai MOBIS, Seoul, South Korea

6. Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA, USA

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx7/43/6917053/10322780.pdf?arnumber=10322780

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