Accelerating Loop-Oriented RTL Simulation With Code Instrumentation-Reference-Cited by-同舟云学术

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Accelerating Loop-Oriented RTL Simulation With Code Instrumentation

Published:2023-12 Issue:12 Volume:42 Page:4985-4998
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Mao Fubing¹^ORCID,Guo Yapu¹,Liao Xiaofei¹^ORCID,Jin Hai¹^ORCID,Zhang Wei²^ORCID,Liu Haikun¹^ORCID,Zheng Long¹^ORCID,Liu Xu¹,Jiang Zihan¹,Zheng Xiaohua¹

Affiliation:

1. National Engineering Research Center for Big Data Technology and System, Services Computing Technology and System Lab, and the Cluster and Grid Computing Lab, School of Computer Science and Technology, Huazhong University of Science and Technology, Wuhan, China

2. Department of ECE, Reconfiguration Computing Systems Laboratory, Hong Kong University of Science and Technology, New Territories, Hong Kong

Funder

National Key Research and Development Program of China

National Natural Science Foundation of China

Huawei Technologies Company Ltd

Hong Kong Research Grants Council GRF

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx7/43/10325328/10128151.pdf?arnumber=10128151

Reference20 articles.

1. Accelerating RTL Simulation by Several Orders of Magnitude Using Clock Suppression

2. MachSuite: Benchmarks for accelerator design and customized architectures

3. Reveal training performance mystery between TensorFlow and PyTorch in the single GPU environment

4. Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations

5. MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems

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